IR2110( - 1 - 2)(S)PbF/IR2113( - 1 - 2)(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figures 28 through 35.
Symbol
V B
V S
V HO
V CC
V LO
V DD
V SS
V IN
dV s /dt
Definition
High side floating supply voltage (IR2110)
(IR2113)
High side floating supply offset voltage
High side floating output voltage
Low side fixed supply voltage
Low side output voltage
Logic supply voltage
Logic supply offset voltage
Logic input voltage (HIN, LIN & SD)
Allowable offset supply voltage transient (figure 2)
Min.
-0.3
-0.3
V B - 25
V S - 0.3
-0.3
-0.3
-0.3
V CC - 25
V SS - 0.3
Max.
525
625
V B + 0.3
V B + 0.3
25
V CC + 0.3
V SS + 25
V CC + 0.3
V DD + 0.3
50
Units
V
V/ns
P D
R THJA
T J
T S
T L
Package power dissipation @ T A ≤ +25 ° C
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
(14 lead DIP)
(16 lead SOIC)
(14 lead DIP)
(16 lead SOIC)
-55
1.6
1.25
75
100
150
150
300
W
° C/W
° C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Typical
ratings at other bias conditions are shown in figures 36 and 37.
Symbol
V B
Definition
High side floating supply absolute voltage
Min.
V S + 10
Max.
V S + 20
Units
V S
V HO
High side floating supply offset voltage
High side floating output voltage
(IR2110)
(IR2113)
Note 1
Note 1
V S
500
600
V B
V CC
V LO
V DD
V SS
V IN
T A
Low side fixed supply voltage
Low side output voltage
Logic supply voltage
Logic supply offset voltage
Logic input voltage (HIN, LIN & SD)
Ambient temperature
10
0
V SS + 3
-5 (Note 2)
V SS
-40
20
V CC
V SS + 20
5
V DD
125
V
° C
Note 1: Logic operational for V S of -4 to +500V. Logic state held for V S of -4V to -V BS . (Please refer to the Design Tip
DT97-3 for more details).
Note 2: When V DD < 5V, the minimum V SS offset is limited to -V DD.
2
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